A typical integrated circuit (IC) chip or die includes circuit elements formed on a semiconductor substrate. On one face, the die will have an array of electrical contacts for electrical communication (signal and power) with circuit elements external to the chip. Due to the small size of the die, the contacts are necessarily small and finely pitched. The size and pitch of the contacts make a direct assembly of chips within a larger component exceedingly difficult. Accordingly, one or more dies are frequently prepackaged in an IC package which provides a more convenient electrical interface with the outside world.
In common packing configurations, the die is placed on the upper surface of a package substrate with the contact-bearing face of the die facing upward. It is noted that the recited directions are relative and reflect the common orientation in which the components are assembled. Once assembled, the package may be used in a variety of orientations. The package substrate has a first array of contacts, typically located on the upper surface of the substrate, laterally beyond the area covered by the die. Each contact in this first array is generally associated with a contact on the die and is electrically connected to such associated contact by a technique such as wiring bonding or tape bonding.
The package substrate will typically include a second array of contacts, each typically in electrical communication with an associated contact of the first array. The second array is configured to provide a desired interface between the package and the outside world. The second array of contacts may take the form of wire leads or may take the form of or interface with a pin grid array (PGA), ball grid array (BGA) or other appropriate contact or connection system.
It is known to use a bypass capacitor in association with an IC die for purposes including the reduction of power transients. A bypass capacitor may be mounted in a variety of locations, including atop the die or atop the upper surface of the package substrate. Typically, one lead or pole of the capacitor is connected to the die's drain voltage V.sub.DD input while the other lead or pole is connected to the die's source voltage V.sub.SS input.
The flip chip package is known as an alternative to the more traditional face-up chip packaging. A flip chip package has a die which is flipped 180.degree. relative to a die in a face-up package so that the die's contacts are facing the upper surface of the package substrate. The first contact array of the package substrate is substantially formed as a mirror image of the package array of contacts on the die and is located on the upper surface of the substrate immediately below the die. Associated contacts of the die and the first contact array of the package substrate may be electrically connected via an appropriate process such as bumping.
It is accordingly desirable that a package construction be provided which is particularly well suited to the provision of one or more bypass capacitors in a flip chip package.